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1 ? fn7497.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. ISL55002, isl55004 high supply voltage 220mhz unity-gain stable operational amplifiers the ISL55002 and isl55004 are high speed, low power, low cost monolithic operational amplifiers. the ISL55002 and isl55004 are unity-gain stable and feature a 300v/s slew rate and 220mhz bandwidth while requiring only 9ma of supply current. the power supply operating range of the ISL55002 and isl55004 is from 15v down to 2.5v. for single-supply operation, the ISL55002 and isl55004 operate from 30v down to 5v. the ISL55002 and isl55004 also feature an extremely wide output voltage swing of -12.75v/+13.4v with v s = 15v and r l = 1k ? . at a gain of +1, the ISL55002 and isl55004 have a -3db bandwidth of 220mhz with a phase margin of 50. because of its conventional voltage-f eedback topology, the ISL55002 and isl55004 allow the use of reactive or non-linear elements in its feedback network. this versatility combined with low cost and 140ma of out put-current drive makes the ISL55002 and isl55004 an ideal choice for price-sensitive applications requiring low power and high speed. the ISL55002 is available in an 8-pin so package and the isl55004 in a 14-pin so (0.150?) package. all are specified for operation over the full -40c to +85c temperature range. features ? 220mhz -3db bandwidth ? unity-gain stable ? low supply current: 9ma @ v s = 15v ? wide supply range: 2.5v to 15v dual-supply and 5v to 30v single-supply ? high slew rate: 300v/s ? fast settling: 75ns to 0.1% for a 10v step ? wide output voltage swing: -12.75v/+13.6v with v s = 15v, r l =1k ? ? low cost, enhanced replacement for the ad847 and lm6361 ? pb-free plus anneal available (rohs compliant) applications ? video amplifiers ? single-supply amplifiers ? active filters/integrators ? high speed sample-and-hold ? high speed signal processing ? adc/dac buffers ? pulse/rf amplifiers ? pin diode receivers ? log amplifiers ? photo multiplier amplifiers ? difference amplifiers pinouts ISL55002 (8-pin so) top view isl55004 [14-pin so (0.150?)] top view 1 2 3 4 8 7 6 5 out in1- in1+ vs- vs+ out2 in2- in2+ -+ - + 1 2 3 4 14 13 12 11 5 6 7 10 9 8 out1 in1- in1+ vs+ in2+ in2- out2 out4 in4- in4+ vs- in3+ in3- out3 -+ - + -+ - + data sheet july 15, 2005
2 fn7497.1 july 15, 2005 ordering information part number package tape & reel pkg. dwg. # ISL55002ib 8-pin so - m8.15 ISL55002ib-t7 8-pin so 7? m8.15 ISL55002ib-t13 8-pin so 13? m8.15 ISL55002ibz (see note) 8-pin so (pb-free) - m8.15 ISL55002ibz-t7 (see note) 8-pin so (pb-free) 7? m8.15 ISL55002ibz-t13 (see note) 8-pin so (pb-free) 13? m8.15 isl55004ib 14-pin so (0.150?) - m14.15 isl55004ib-t7 14-pin so (0.150?) 7? m14.15 isl55004ib-t13 14-pin so (0.150?) 13? m14.15 isl55004ibz (see note) 14-pin so (0.150?) (pb-free) - m14.15 isl55004ibz-t7 (see note) 14-pin so (0.150?) (pb-free) 7? m14.15 isl55004ibz-t13 (see note) 14-pin so (0.150?) (pb-free) 13? m14.15 note: intersil pb-free plus anneal products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish , which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classi fied at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. ISL55002, isl55004
3 fn7497.1 july 15, 2005 absolute maxi mum ratings (t a = 25c) supply voltage (v s ) . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5v or 33v input voltage (v in) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v s differential input voltage (dv in ). . . . . . . . . . . . . . . . . . . . . . . . .10v continuous output current . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma power dissipation (p d ) . . . . . . . . . . . . . . . . . . . . . . . . . see curves operating temperature range (t a ). . . . . . . . . . . . . .-40c to +85c operating junction temperature (t j ) . . . . . . . . . . . . . . . . . . +150c storage temperature (t st ) . . . . . . . . . . . . . . . . . . .-65c to +150c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a dc electrical specifications v s = 15v, r l = 1k ? , t a = 25c, unless otherwise specified. parameter description condition min typ max unit v os input offset voltage v s = 15v 1.2 5 mv tcv os average offset voltage drift v/c i b input bias current v s = 15v 0.6 3.5 a i os input offset current v s = 15v 0.2 2 a tci os average offset current drift (note 1) tbd na/c a vol open-loop gain v s = 15v, v out = 10v, r l = 1k ? 12000 21000 v/v psrr power supply rejection ratio v s = 5v to 15v 75 100 db cmrr common-mode rejection ratio v cm = 10v, v out = 0v 75 90 db cmir common-mode input range v s = 15v 13 v v out output voltage swing v o +, r l = 1k ? 13.3 13.4 v/v v o -, r l = 1k ? -12.6 -12.75 v/v v o +, r l = 150 ? 9.6 10.7 v/v v o -, r l = 150 ? -6.5 -8.2 v/v i sc output short circuit current t a = 25c 80 140 ma i s supply current (per amplifier) v s = 15v, no load 9 9.5 ma r in input resistance 2.0 3.2 m ? c in input capacitance a v = +1 @10mhz 1 pf r out output resistance a v = +1 50 m ? psor power supply operating range dual supply 2.25 15 v single supply 4.5 30 v note: 1. measured from t min to t max . ac electrical specifications v s = 15v, a v = +1, r l = 1k ? unless otherwise specified. parameter description condition min typ max unit bw -3db bandwidth (v out = 0.4v pp )v s = 15v, a v = +1 220 mhz v s = 15v, a v = -1 55 mhz v s = 15v, a v = +2 53 mhz v s = 15v, a v = +5 17 mhz gbwp gain bandwidth product v s = 15v 70 mhz pm phase margin r l = 1k ? , c l = 5pf 55 ISL55002, isl55004
4 fn7497.1 july 15, 2005 sr slew rate (note 1) 260 300 v/s fpbw full-power bandwidth (note 2) v s = 15v 9.5 mhz t s settling to +0.1% (a v = +1) v s = 15v, 10v step 75 ns dg differential gain (note 3) ntsc/pal 0.01 % dp differential phase ntsc/pal 0.05 en input noise voltage 10khz 12 nv/ hz in input noise current 10khz 1.5 pa/ hz notes: 1. slew rate is measured on rising edge. 2. for v s = 15v, v out = 10v pp , for v s = 5v, v out = 5v pp . full-power bandwidth is based on slew rate measurement using fpbw = sr / (2 * v peak ). 3. video performance measured at v s = 15v, a v = +2 with two times normal video level across r l = 150 ? . this corresponds to standard video levels across a back-terminated 75 ? load. for other values or r l , see curves. ac electrical specifications v s = 15v, a v = +1, r l = 1k ? unless otherwise specified. (continued) parameter description condition min typ max unit typical performance curves figure 1. open-loop gain vs frequency f igure 2. open-loop phase vs frequency figure 3. gain vs frequency for various non- inverting gain settings figure 4. gain vs frequency for various inverting gain settings ISL55002, isl55004
5 fn7497.1 july 15, 2005 figure 5. phase vs frequency for various non- inverting gain settings figure 6. phase vs frequency for various inverting gain settings figure 7. gain bandwidth product vs supply figure 8. slew rate vs supply figure 9. gain vs frequency for various r load (a v = +1) figure 10. gain vs frequency for various r load (a v = +2) typical performance curves 350 300 250 200 150 100 0 2 8 1012141618 6 4 supply voltages (v) slew rate (v/s) a v =+2 r f =500 ? r l =500 ? c l =5pf positive slew rate negative slew rate ISL55002, isl55004
6 fn7497.1 july 15, 2005 figure 11. gain vs frequency for various c load (a v = +1) figure 12. gain vs frequency for various c load (a v = +2) figure 13. gain vs frequency for various r feedback (a v = +1) figure 14. gain vs frequency for various r feedback (a v = +2) figure 15. gain vs frequency for various inverting input capacitance (c in ) figure 16. gain vs frequency for various supply settings typical performance curves 5 3 1 -3 -5 100k 1m 10m 1g frequency (hz) normalized gain (db) a v =+1 r f =0 ? r l =500 ? c l =5pf -1 100m v s =2.5v v s =10v v s =15v v s =5v ISL55002, isl55004
7 fn7497.1 july 15, 2005 figure 17. common-mode rejection ratio (cmrr) figure 18. power supply rejection ratio (psrr) figure 19. harmonic distortion vs frequency (a v = +1) figure 20. harmonic distortion vs output voltage (a v = +2) figure 21. output swing vs frequency for various gain settings figure 22. output swing vs supply voltage for various gain settings typical performance curves -20 -30 -40 -60 -80 -100 500k 1m 10m 40m frequency (hz) harmonic distortion (dbc) v s =15v a v =+1 r f =0 ? r l =500 ? c l =5pf v out =2v p-p -50 -70 -90 thd 3rd hd 2nd hd ISL55002, isl55004
8 fn7497.1 july 15, 2005 figure 23. large signal rise and fall times fig ure 24. small signal rise and fall times figure 25. supply current vs supply voltage figure 26. package power dissipation vs ambient temperature figure 27. package power dissipation vs ambient temperature typical performance curves 20% to 80% 80% to 20% 20% to 80% 80% to 20% ja =160c/w so8 ja =120c/w so14 1.2 1 0.8 0.6 0.2 0 0 255075100 150 ambient temperature (c) power dissipation (w) 125 85 jedec jesd51-3 low effective thermal conductivity test board 0.4 1.042w 781mw 1.420w 1.136w ja =110c/w so8 ja =88c/w so14 1.8 1.6 1.4 0.8 0.6 0.2 0 power dissipation (w) jedec jesd51-7 high effective thermal conductivity test board 0.4 1 1.2 0 25 50 75 100 150 ambient temperature (c) 125 85 ISL55002, isl55004
9 fn7497.1 july 15, 2005 product description the ISL55002 and isl55004 are wide bandwidth, low power, and low offset voltage feedback operational amplifiers. these devices are internally compensated for closed loop gain of +1 or greater. connected in voltage follower mode and driving a 500 ? load, the -3db bandwidth is around a 220mhz. driving a 150 ? load and a gain of 2, the bandwidth is about 90mhz while maintaining a 300v/s slew rate. the ISL55002 and isl55004 are designed to operate with supply voltage from +15v to -15v. that means for single supply application, the supply vo ltage is from 0v to 30v. for split supplies application, the supply voltage is from 15v. the amplifier has an input common-mode voltage range from 1.5v above the negative supply (v s - pin) to 1.5v below the positive supply (v s + pin). if the input signal is outside the above specified range, it will cause the output signal to be distorted. the outputs of the ISL55002 and isl55004 can swing from -12.75v to +13.4v for v s = 15v. as the load resistance becomes lower, the output swing is lower. choice of feedback resistor and gain bandwidth product for applications that require a gain of +1, no feedback resistor is required. just shor t the output pin to the inverting input pin. for gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. as this pole becomes smaller, the amplifier's phase margin is reduced. this causes ringing in the time domain and peaking in the frequen cy domain. therefore, r f can't be very big for optimum performance. if a large value of r f must be used, a small capacitor in the few pico farad range in parallel with r f can help to reduce the ringing and peaking at the expense of reducing the bandwidth. for gain of +1, r f = 0 is optimum. for the gains other than +1, optimum response is obtained with r f with proper selection of r f and r g (see figures15 and 16 for selection.) video performance for good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as dc levels are changed at the output. this is especially difficult when driving a standard video load of 150 ? , because of the change in output current with dc level. the dg and dp of this device is about 0.01% and 0.05, while driving 150 ? at a gain of 2. driving high impedance loads would give a si milar or better dg and dp performance. driving capacitive loads and cables the ISL55002 and isl55004 can drive 47pf loads in parallel with 500 ? with less than 3db of peaking at gain of +1 and as much as 100pf at a gain of +2 with under 3db of peaking. if less peaking is desired in applications, a small series resistor (usually between 5 ? to 50 ? ) can be placed in series with the output to eliminate most peaking. however, this will reduce the gain slightly. if the gain settin g is greater than 1, the gain resistor r g can then be chosen to make up for any gain loss which may be created by the addit ional series resistor at the output. when used as a cable driver, double termination is always recommended for reflection-free performance. for those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. however, other applications may have high capacitive loads without a back-termination resistor. again, a small series resistor at the output can help to reduce peaking. output drive capability the ISL55002 and isl55004 do not have internal short circuit protection circuitry. they have a typical short circuit current of 140ma. if the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. maximum reliability is maintained if the output current never exceeds 60ma. this limit is set by the design of the internal metal interconnect. note that in transi ent applications, the part is robust. short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. in video applications this would be a 75 ? resistor and will provide adequate short circuit protection to the device. care should still be taken not to stress the device with a short at the output. power dissipation with the high output drive cap ability of the ISL55002 and isl55004, it is possible to exceed the 150c absolute maximum junction temperature under certain load current conditions. therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. the maximum power dissipation allowed in a package is determined according to: where: ?t jmax = maximum junction temperature ?t amax = maximum ambient temperature ? ja = thermal resistance of the package the maximum power dissipation actually produced by an ic is the total quiescent supply current times the total power supply voltage, plus the power in the ic due to the load, or: pd max t jmax t amax ? ja -------------------------------------------- - = ISL55002, isl55004
10 fn7497.1 july 15, 2005 for sourcing: for sinking: where: ?v s = supply voltage ?i smax = maximum quiescent supply current ?v out = maximum output voltage of the application ?r load = load resistance tied to ground ?i load = load current ? n = number of amplifiers (max = 2) by setting the two pd max equations equal to each other, we can solve the output current and r load to avoid the device overheat. power supply bypassing printed circuit board layout as with any high frequency device, a good printed circuit board layout is necessary for optimum performance. lead lengths should be as short as possible. the power supply pin must be well bypassed to reduce the risk of oscillation. for normal single supply operation, where the v s - pin is connected to the ground plane, a single 4.7f tantalum capacitor in parallel with a 0. 1f ceramic capacitor from v s + to gnd will suffice. this same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. in this case, the v s - pin becomes the negative supply rail. printed circuit board layout for good ac performance, parasitic capacitance should be kept to minimum. use of wire wound resistors should be avoided because of their additional series inductance. use of sockets should also be avoided if possible. sockets add parasitic inductance and capacitance that can result in compromised performanc e. minimizing parasitic capacitance at the amplifier's inverting input pin is very important. the feedback resistor should be placed very close to the inverting input pin. strip line design techniques are recommended for the signal traces. application circuits sullen key low pass filter a common and easy to implemen t filter taking advantage of the wide bandwidth, low offset and low power demands of the ISL55002 and isl55004. a derivation of the transfer function is provided for convenience (see figure 28). sullen key high pass filter again this useful filter benefits from the characteristics of the ISL55002 and isl55004. the transfer function is very similar to the low pass so only the resu lts are presented (see figure 29). pd max v s i smax v s v outi ? () i1 = n v outi r li ----------------- + = pd max v s i smax v outi v s ? () i1 = n i loadi + = ISL55002, isl55004
11 fn7497.1 july 15, 2005 figure 28. sullen key low pass filter figure 29. sullen key high pass filter k 3 1 q rc 1 wo k holp c r c r c r c r c r c r ) k 1 ( 1 q c r c r 1 wo k holp ) c r c r c r ) k 1 (( jw c r c r w 1 1 ) jw ( h 1 s ) c r c r c r ) k 1 (( s c r c r k ) s ( h 0 s c 1 vi vo r v k vo 1 r vi v v 1 s c r 1 k vo r r 1 k 1 1 2 2 1 2 2 1 2 2 1 1 2 2 1 1 2 2 2 1 1 1 2 2 1 1 2 2 21 2 1 1 1 2 2 2 1 1 1 2 1 1 1 1 2 2 a b ? = = = + + ? = = = + + ? + ? = + + + ? + = = ? + ? + ? + = + = equations simplify if we let all components be equal r=c + - v+ v- v 2 5v c 5 1nf v out r 7 1k ? v 3 5v r 1 1k ? r 2 1k ? c 2 1nf v 1 c 1 1nf c 5 1nf r a 1k ? r b 1k ? k 4 2 q rc 2 wo k 4 k holp c r c r c r c r c r c r ) k 1 ( 1 q c r c r 1 wo k holp 1 1 2 2 1 2 2 1 2 2 1 1 2 2 1 1 ? = = ? = + + ? = = = equations simplify if we let all components be equal r=c + - v+ v- v 2 5v c 5 1nf v out r 7 1k ? v 3 5v r 1 1k ? r 2 1k ? c 2 1nf v 1 c 1 1nf c 5 1nf r a 1k ? r b 1k ? ISL55002, isl55004
12 fn7497.1 july 15, 2005 differential output instrumentation amplifier the addition of a third amplifier to the conventional three amplifier instrumentation amplif ier introduces the benefits of differential signal realization, specifically the advantage of using common-mode rejection to remove coupled noise and ground potential errors inherent in remote transmission. this configuration also provides enhanced bandwidth, wider output swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and few resistors. strain gauge the strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the ISL55002 and isl55004. the operation of the circuit is very straightforward. as the strain variable component resistor in the balanced bridge is subjected to increasing strain, its resistance changes, resulting in an imbalance in the bridge. a voltage variation from the referenced high accuracy source is generated and translate d to the difference amplifier through the buffer stage. this voltage difference as a function of the strain is converted into an output voltage. + - - + - + + - e o e o 4 e o 3 ref r 3 r 3 r 3 r 3 r 3 r 3 r 2 r 2 r g a 2 e 2 a 4 a 3 r 3 r 3 a 1 e 1 + - e o3 12r 2 r g ? + () e 1 e 2 ? () ? = e o4 12r 2 r g ? + () e 1 e 2 ? () = e o 21 2r 2 r g ? + () e 1 e 2 ? () ? = bw 2f c1 2 , a di ----------------- - = a di 21 2r 2 r g ? + () ? = + - v+ v- v 2 5v c 12 1nf v out (v1+v2+v3+v4) r l 1k ? v 4 5v r 17 1k ? c 6 1nf r f 1k ? + - r 18 1k ? + - + - variable subject to strain 1k ? 1k ? r 15 r 16 1k ? 1k ? v 5 0v ISL55002, isl55004
13 fn7497.1 july 15, 2005 small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 o 8 o 0 o 8 o - rev. 0 12/93 ISL55002, isl55004
14 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7497.1 july 15, 2005 small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not ex ceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m14.15 (jedec ms-012-ab issue c) 14 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.3367 0.3444 8.55 8.75 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n14 147 0 o 8 o 0 o 8 o - rev. 0 12/93 ISL55002, isl55004

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